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| c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . s y s t e m p o w e r p w m c o n t r o l l e r f o r n o t e b o o k c o m p u t e r s w i t h c h a r g e p u m p f e a t u r e s w i d e i n p u t v o l t a g e r a n g e f r o m 6 v t o 2 5 v p r o v i d e 5 i n d e p e n d e n t o u t p u t s w i t h 1 . 0 % a c c u - r a c y o v e r - t e m p e r a t u r e - p w m 1 c o n t r o l l e r w i t h a d j u s t a b l e ( 2 v t o 5 . 5 v ) o u t - p u t - p w m 2 c o n t r o l l e r w i t h a d j u s t a b l e ( 2 v t o 5 . 5 v ) o u t - p u t - 1 0 0 m a l o w d r o p o u t r e g u l a t o r ( l d o 5 ) w i t h f i x e d 5 v o u t p u t - 1 0 0 m a l o w d r o p o u t r e g u l a t o r ( l d o 3 ) w i t h f i x e d 3 . 3 v o u t p u t - 2 7 0 k h z c l o c k s i g n a l f o r 1 5 v c h a r g e p u m p ( u s e d v o u t 1 a s i t s p o w e r s u p p l y ) e x c e l l e n t l i n e / l o a d r e g u l a t i o n s a b o u t 1 . 5 % o v e r - t e m p e r a t u r e r a n g e b u i l t i n p o r c o n t r o l s c h e m e i m p l e m e n t e d c o n s t a n t o n - t i m e c o n t r o l s c h e m e w i t h f r e q u e n c y c o m p e n s a t i o n f o r p w m m o d e s e l e c t a b l e s w i t c h i n g f r e q u e n c y i n p w m m o d e b u i l t - i n d i g i t a l s o f t - s t a r t f o r p w m o u t p u t s a n d s o f t - s t o p f o r p w m o u t p u t s a n d l d o o u t p u t s i n t e g r a t e d b o o t s t r a p f o r w a r d p - c h m o s f e t h i g h e f f i c i e n c y o v e r l i g h t t o f u l l l o a d r a n g e ( p w m s ) b u i l t - i n p o w e r g o o d i n d i c a t o r s ( p w m s ) i n d e p e n d e n t e n a b l e i n p u t s ( p w m s , l d o ) 7 0 % u n d e r - v o l t a g e a n d 1 2 5 % o v e r - v o l t a g e p r o t e c - t i o n s ( p w m ) a d j u s t a b l e c u r r e n t - l i m i t p r o t e c t i o n ( p w m s ) - u s i n g s e n s e l o w - s i d e m o s f e t ? s r d s ( o n ) o v e r - t e m p e r a t u r e p r o t e c t i o n 3 m m x 3 m m t h i n q f n - 2 0 ( t q f n 3 x 3 - 2 0 ) p a c k a g e l e a d f r e e a n d g r e e n d e v i c e a v a i l a b l e ( r o h s c o m p l i a n t ) g e n e r a l d e s c r i p t i o n s i m p l i f i e d a p p l i c a t i o n c i r c u i t the APW8822/a/b/c integrates dual step-down, constant- on-time, synchronous pwm controllers (that drives dual n-channel mosfets for each channel) and two low drop- out regulators as well as various protections into a chip. the pwm controllers step down high voltage of a battery to generate low-voltage for nb applications. the output of pwm1 and pwm2 can be adjusted from 2v to 5.5v by setting a resistive voltage-divider from voutx to gnd. the linear regulators provide 5v and 3.3v output for standby power supply. the linear regulators provide up to 100ma output current. when the pwmx output voltage is higher than ldox bypass threshold, the related ldox regulator is shut off and its output is connected to voutx by internal switchover mosfet. it can save power dissipation. the charge pump circuit with 270khz clock driver uses vout1 as its power supply to generate ap- proximately 15v dc voltage. the APW8822/a/b/c provides excellent transient response and accurate dc output voltage in either pfm or pwm mode. in pulse-frequency mode (pfm), the APW8822/a/b/c provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. the forced-pwm mode works nearly at constant frequency for low-noise requirements. the unique ultrasonic mode maintains the switching frequency above 25khz, which eliminates noise in audio application. v out 2 l 2 q 3 pwm 2 q 4 v out 1 v in 6 v ~ 25 v pwm 1 l 1 q 1 q 2 ldo 5 ldo 3 v ldo 3 v ldo 5 enilim 1 enilim 2 en ldo charge pump d 1 d 4 d 3 d 2 c 4 c 3 c 2 c 1 v cp free datasheet http:///
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 g e n e r a l d e s c r i p t i o n ( c o n t . ) n o t e b o o k a n d s u b - n o t e b o o k c o m p u t e r s p o r t a b l e d e v i c e s d d r 1 , d d r 2 , a n d d d r 3 p o w e r s u p p l i e s 3 - c e l l a n d 4 - c e l l l i + b a t t e r y - p o w e r e d d e v i c e s g r a p h i c c a r d s g a m e c o n s o l e s telecommunications a p p l i c a t i o n s o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . the APW8822/a/b/c is equipped with accurate sourc- ing and current-limit, output under-voltage output over- voltage protections, being perfect for nb applications. a 1.4ms (typ.) digital soft-start can reduce the start-up current. a soft-stop function actively discharges the output capacitors by the discharge device . the APW8822/a/b has individual enable controls for each pwm channels. pulling both en1/2 pin low shuts down the all of outputs unless ldo3 output. the ldo3 and ldo5 of APW8822a/c are always on standby power. the APW8822/a/b/c is available in a tqfn3x3-20 package. apw 8822 apw 8822 a apw 8822 b apw 8822 c handling code temperature range package code package code q b : t qfn 3 x 3 - 20 operating ambient temperature range i : - 40 to 85 c handling code tr : tape & reel lead free code l : lead free device assembly material g : halogen and lead free device apw 8822 qb : xxxxx - date code apw 8822 a qb : xxxxx - date code xxxxx apw 8822 xxxxx apw 8822 a apw 8822 b qb : xxxxx - date code xxxxx apw 8822 b apw 8822 c qb : xxxxx - date code xxxxx apw 8822 c device number enable function skip mode always on - ldo APW8822qbi en1/en2 auto - skip ldo3 APW8822aqbi enldo/enilim1/enilim2 auto - skip ldo3 & ldo5 APW8822bqbi en1/en2 ultra - sonic ldo3 APW8822cqbi en1/en2 auto - skip ldo3 & ldo5 free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 3 p i n c o n f i g u r a t i o n = gnd and thermal pad ( connected to gnd plane for better hat dissipation ) bottom view e n 1 v c l k p h a s e 1 b o o t 1 u g a t e 1 ilim 1 fb 1 ldo 3 fb 2 ilim 2 e n 2 p o k p h a s e 2 b o o t 2 u g a t e 2 lgate 1 ldo 5 byp vin lgate 2 apw 8822 apw 8822 b apw 8822 c 4 3 2 1 5 17 18 19 20 16 tqfn 3 x 3 - 20 top view 9 8 7 6 10 12 13 14 15 11 bottom view e n l d o v c l k p h a s e 1 b o o t 1 u g a t e 1 enilim 1 fb 1 ldo 3 fb 2 enilim 2 n c p o k p h a s e 2 b o o t 2 u g a t e 2 lgate 1 ldo 5 byp vin lgate 2 apw 8822 a 4 3 2 1 5 17 18 19 20 16 tqfn 3 x 3 - 20 top view 9 8 7 6 10 12 13 14 15 11 a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) symbol parameter rating unit v in input power voltage (vin to gnd) - 0.3 ~ 28 v v boot boot supply voltage (boot to phase) - 0.3 ~ 7 v v boot - gnd boot supply voltage (boot to gnd) <20ns pulse width >20ns pulse width - 5 ~ 42 - 0.3 ~ 35 v v ug - phase ugate volt age (ugate to phase) <20ns pulse width >20ns pulse width - 5 ~ v boot +0.3 - 0.3 ~ v boot +0.3 v v lg - gnd lgate voltage (lgate to gnd) <20ns pulse width >20ns pulse width - 5 ~ v ldo5 +0.3 - 0.3 ~ v ldo5 +0.3 v v phase phase voltage (phase to gnd) <20ns pulse width >2 0ns pulse width - 5 ~ 35 - 0.3 ~ 28 v all other pins (ldox, fbx, voutx, ldo5, ldo3, ref, vclk, en ldo, enilimx to gnd) - 0.3 ~ 6 v t j maximum junction temperature 150 o c t stg storage temperature - 65 ~ 150 o c t sdr maximum lead soldering temperature, 10 se conds 260 o c note1: stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom- mended operating conditions" is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 4 t h e r m a l c h a r a c t e r i s t i c s ( n o t e 2 ) symbol parameter typical value unit q ja thermal resistance - junction to ambient 95 q jc thermal resistance - junction to case 60 o c/w note 2: q ja is measured with the component mounted on a high effective thermal conductivity test board in free air. the thermal pad of package is soldered directly on the pcb. r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s symbol parameter range unit v in pwm1/2 converter input voltage 6 ~ 25 v v out1 pwm1 converter output voltage 2 ~ 5.5 v v out2 pwm2 converter output voltage 2 ~ 5.5 v c in pwm1/2 converter input capacitor (mlcc) 10 ~ m f c ldo ldo output capacitor (mlcc) 1. 0 ~ m f t a ambient temperature - 40 ~ 85 o c t j junction temperature - 40 ~ 125 o c e l e c t r i c a l c h a r a c t e r i s t i c s APW8822 symbol parameter test conditions min. typ. max. unit input supply power supply current1, vout1=0v, en1=en2=5v, vfb1 = vfb2 = 2.05v - 0.86 1.2 ma supply current2, vout1=5v, en1=en2=5v, v fb1 = v fb2 = 2.05v, p vin +p ldo5 - 5 7 mw standby current1, vout1=0v, en1=en2=0v (for APW8822/b) - - 80 standby current2, vout1=0v, en1=en2=0v (for APW8822a/c) - 180 245 i vn vin supply current shutdown current, enldo=0v, enilimx=0v (for APW8822a) - 20 40 m a under - voltage lock out protection (uvlo) rising edge 4.1 4.2 4.3 v ldo5 uvlo threshold hysteresis - 0.1 - v rising edge 3.0 3.15 3.3 v ldo3 uvlo threshold hysteresis - 0.8 - v r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t s . t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 1 2 v a n d t a = - 4 0 ~ 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . t y p i c a l v a l u e s a r e a t t a = 2 5 c . free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 5 e l e c t r i c a l c h a r a c t e r i s t i c s r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t s . t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 1 2 v a n d t a = - 4 0 ~ 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . t y p i c a l v a l u e s a r e a t t a = 2 5 c . APW8822 symbol parameter test conditions min. typ. max. unit under - voltage lock out protection (uvlo) rising threshold1, ldo3 enable - 3.8 - v rising threshold1_a/c, ldo3 & ldo5 enable (for APW8822a/c) - 3.8 - v rising thres hold2, ldo5 enable - 5.1 - v falling threshold2, pwmx shutdown with soft stop. when pwmx soft stop is complete , ldo5 will begin to shutdown - 5.0 - v vin por threshold falling threshold1, ldox shutdown with soft stop - 3.7 - v pwm controllers output voltage adjust range vout1, vout2 2 - 5.5 v v fb fbx reference voltage t a = - 40 o c to 85 o c 1.98 2.0 2.02 v i fb fbx input current v fbx =2.0v, t a =25 o c - 20 - 20 na t ss soft - start ramp time enx high to v out 95% regulation, ldo5=5v - 1.4 - ms soft - stop time enx low to v f bx <0.1v - 1.7 - ms f sw1 pwm1 switching frequency v in =20v, pwm1=5v 240 300 360 f sw2 pwm2 switching frequency v in =20v, pwm2=3.33v 280 355 430 khz ugatex minimum off - time 200 350 500 ns low drouput linear regulators (ldo5/ldo3) ldo5 output voltage vout1=gnd, 6v c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 7 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t s . t h e s e s p e c i f i c a t i o n s a p p l y o v e r v i n = 1 2 v a n d t a = - 4 0 ~ 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . t y p i c a l v a l u e s a r e a t t a = 2 5 c . APW8822 symbol parameter test conditions min. typ. max. unit gate drivers ug pull - up resistance v bootx ? v ugatex =250mv - 3 5 w ug sink resistance v ugatex ? v phasex =250mv - 1.7 2.5 w lg pull - up resistance v ldo5 ? v lgatex =250mv - 3 5 w lg sink resistance v lgatex ? v pgnd =250mv - 1 2 w dead time ug falling to lg rising - 20 - ns lg falling to ug rising - 20 - ns bootstrap switch v f forward voltage v ldo5 ? v bootx - gnd , i f = 10ma - 0.4 0.5 v i r reverse leakage v bootx - gnd = 30v, v phasex = 25v , v ldo5 = 5v - - 0.5 m a free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 8 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s 4 . 9 495 5 5 . 05 5 . 1 0 . 001 0 . 01 0 . 1 1 o u t p u r v o l t a g e ( v ) output current ( a ) 10 5 . 15 load regulation vout = 5 v v in = 8 v v in = 12 v v in = 20 v 3 . 23 3 . 28 3 . 33 3 . 38 3 . 43 0 . 001 0 . 01 0 . 1 1 output current ( a ) 10 o u t p u r v o l t a g e ( v ) load regulation vout = 3 . 3 v v in = 8 v v in = 12 v v in = 20 v free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 9 o p e r a t i n g w a v e f o r m s r e f e r t o t h e t y p i c a l a p p l i c a t i o n c i r c u i t . t h e t e s t c o n d i t i o n i s v i n = 1 2 v , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d . ch 1 : en 1 = en 2 , 5 v / div ch 2 : v out 1 , 2 v / div time : 500 us / div start - up 1 4 2 ch 3 : v out 2 , 2 v / div v en 1 = en 2 v out 1 v pok v out 2 ch 4 : v pok , 10 v / div output - discharge 1 4 2 3 v en 1 = en 2 v out 1 v out 2 v pok ch 1 : en 1 = en 2 , 5 v / div ch 2 : v out 1 , 2 v / div time : 500 us / div ch 3 : v out 2 , 2 v / div ch 4 : v pok , 10 v / div 5 v load transient ch 1 : v out 1 , 100 mv / div , ac time : 20 us / div ch 3 : v phase 1 , 20 v / div , dc v out 1 v out 2 v phase 1 1 2 3 4 ch 2 : v out 2 , 100 mv / div , ac ch 4 : i out 1 , 5 a / div i out 1 3 . 3 v load transient ch 1 : v out 1 , 100 mv / div , ac time : 20 us / div ch 3 : v phase 2 , 20 v / div , dc ch 2 : v out 2 , 100 mv / div , ac ch 4 : i out 2 , 5 a / div 1 2 3 4 v out 2 v out 1 v phase 2 i out 2 free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 0 p i n d e s c r i p t i o n pin no. APW8822/b/c APW8822a name function 1 - ilim1 current limit adjustment. there is an internal 10 m a current source from ldo5 to ilim1 and connected a resistor from ilim1 to gnd to set the current limit threshold . the p gnd - phase1 current - limit th reshold is 1/ 8 th the voltage s et at ilim1 over a 0. 2 to 2v range. the logic current limit threshold is default to 250 mv value if ilim1 is 5 v. - 1 enilim1 pwm1 enable and current limit adjustment. there is an internal 10 m a current source from ldo5 to en ili m1 and connected a resistor from enilim1 to gnd to set the current limit threshold . the p gnd - phase1 current - limit threshold is 1/ 8 th the voltage s et at en ilim1 over a 0. 515 to 2v range. the logic current limit threshold is default to 250 mv value if en ilim1 is 5 v. pwm1 and vclk are enabled when enilim1=1. when enilim1=0, pwm1 and vclk are in shutdown. 2 2 fb1 output voltage feedback pin (pwm1). it can use a resistive divider from v out1 to gnd to adjust the output from 2 v to 5.5v. 3 3 ldo3 3.3v linear reg ulator output. ldo 3 can provide a total of 10 0ma , 3.3v external loads. bypass to gnd with a minimum of 1.0uf ceramic capacitor for stability. 4 4 fb2 output voltage feedback pin (pwm 2 ). it can use a resistive divider from v out 2 to gnd to adjust the outpu t from 2 v to 5.5v. 5 - ilim2 current limit adjustment. there is an internal 10 m a current source from ldo5 to ilim 2 and connected a resistor from ilim2 to gnd to set the current limit threshold . the p gnd - phase 2 current - limit threshold is 1/ 8 th the voltage s et at ilim 2 over a 0. 2 to 2v range. the logic current limit threshold is default to 250 mv value if ilim 2 is 5 v. - 5 enilim2 pwm2 enable and current limit adjustment. there is an internal 10 m a current source from ldo5 to en ilim 2 and connected a resistor f rom enilim2 to gnd to set the current limit threshold . the p gnd - phase 2 current - limit threshold is 1/ 8 th the voltage s et at en ilim 2 over a 0. 515 to 2v range. the logic current limit threshold is default to 250 mv value if en ilim 2 is 5 v. pwm2 is enabled when enilim2=1. when enilim2=0, pwm2 is in shutdown. 6 - en2 pwm2 enable . pwm2 is enabled when en2=1. when en2=0, pwm2 is in shutdown. - 6 nc no connection 7 7 pok power - g ood o utput p in of both pwm s (logic and). p ok is an open - drain output used to i ndicate t he status of the pwmx output voltage. connect the pok in to +5v through a pull - high resistor. 8 8 phase 2 junction p oint of t he h igh - s ide mosfet source, o utput f ilter i nductor and t he l ow - s ide mosfet drain for pwm2 . connect this pin to the source of the hi gh - side mosfet. phase 2 serves as the lower supply rail for the u gate2 high - side gate driver. phase2 is the current - sense input for the pwm2. 9 9 boot2 supply input for t he ug ate2 gate driver and an internal level - shift circuit. connect to an external capa citor to create a boosted voltage suitable to drive a logic - level n - channel mosfet. 10 10 ugate2 output of t he h igh - s ide mosfet d river for pwm2 . connect this pin to gate of the high - side mosfet. free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 1 p i n d e s c r i p t i o n ( c o n t . ) pin no. APW8822/b/c APW8822a name function 11 11 lgate2 output of t he l ow - s ide mosfet d river for pwm2 . connect this pin to gate of the low - side mosfet. swings from pgnd to ldo5 . 12 12 vin battery voltage input pin. vin powers linear regulators and is also used for the constant on - time pwm on - time one - shot circuits. connect vin to the battery input and bypass with a 1 m f capacitor for noise interference . 13 13 ldo5 5v linear regulator output. ldo 5 can provide a total of 10 0ma , 5v external loads. when ldo 5 is at 5 v and pwm1 output voltage is over 4.7 v bypass threshold, the internal ldo will shut down, and ldo 5 output pin connects to vout1 through a 1.5 w switch. bypass to gnd with a minimum of 1.0uf ceramic capacitor for stability. 14 14 byp byp is the input pin of switchover voltage for the ldo5. this pin makes a direct measurement of the pwm1 output voltage. 15 15 lgate1 output of t he l ow - s ide mosfet d river for pwm1 . connect this pin to gate of the low - side mosfet. swings from pgnd to ldo5 . 16 16 u gate1 output of t he h igh - s ide mosfet d river for pwm1 . connect this pin to gate of the high - side mosfet. 17 17 boot1 supply input for t he ug ate1 gate driver and an internal level - shift circuit. connect to an external capacitor to create a boosted voltage s uitable to drive a logic - level n - channel mosfet. 18 18 phase 1 junction p oint of t he h igh - s ide mosfet source, o utput f ilter i nductor and t he l ow - s ide mosfet drain for pwm1 . connect this pin to the source of the high - side mosfet. phase 1 serves as the lower supply rail for the u gate1 high - side gate driver. phase1 is the current - sense input for the pwm1. 19 19 vclk 250khz clock output for 15v charge pump. 20 - en1 pwm1 enable . pwm1 is enabled when en1=1. when en1=0, pwm1 is in shutdown. - 20 enldo master en able input. the ldox is enabled when enldo=1. when enldo=0, the ldox is shutdown. see the table2 ? power - up control logics ? . thermal pad thermal pad gnd signal ground for the ic. free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 2 b l o c k d i a g r a m ldo uvlo smps 2 pwm 2 controller en enable power on sequence clear fault latch thermal shutdown ton generator current limit controller ov 2 uv 2 70 % v f b 2 125 % v f b 2 pok 2 fault latch logic ov 1 uv 1 70 % v f b 1 125 % v f b 1 pok fb 2 fb 1 pwm frequency control soft stop soft stop lgate 1 enldo or en 2 / enilim 2 phase 1 phase 2 soft start ldo 5 ldo 5 boot 1 ugate 1 phase 1 lgate 1 boot 2 ugate 2 phase 2 lgate 2 ldo 3 ldo 5 v thbyp 5 ldo 3 vin ldo 5 byp a daptive dead - time diode emulation pwm / pfm transition a daptive dead - time diode emulation pwm / pfm transition smps 1 pwm 2 controller phase 2 phase 1 enldo ( apw 8822 a only ) enldo or en 1 / enilim 1 90 % v fb 2 pok 1 90 % v f b 1 gnd charge pump oscillator vclk pgnd zc 2 zc 1 lgate 2 ilim 2 / enilim 2 ilim 1 / enilim 1 en 2 en 1 free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 3 t y p i c a l a p p l i c a t i o n c i r c u i t for APW8822/b/c c ldo 3 1 m f v in : 6 v to 25 v boot 2 ugate 2 phase 2 lgate 2 fb 2 ilim 2 c boot 2 0 . 22 m f c out 2 330 m f / 6 . 3 vx 2 4 m ohm l out 2 2 . 2 m h c in 2 10 m f q 3 apm 4810 v out 2 3 . 3 v / 11 a r boot 2 0 boot 1 ugate 1 phase 1 lgate 1 fb 1 byp c boot 1 0 . 1 m f c out 1 330 m f / 10 v 9 m ohm l out 1 4 . 7 m h c in 1 10 m f q 1 apm 4810 v out 1 5 v / 7 a r boot 1 0 gnd gnd ldo 5 q 2 apm 4810 q 4 apm 4810 ldo 3 vin en 1 ilim 1 gnd r ilim 2 200 k c ldo 5 1 m f pok gnd r pok 200 k r ilim 1 200 k r top 1 30 k r top 2 13 k r gnd 2 20 k r gnd 1 20 k vclk v cp 15 v c cp 1 100 n f c cp 2 100 n f c cp 3 100 n f c cp 4 1 m f d 1 d 2 d 3 d 4 en 2 on off on off free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 4 t y p i c a l a p p l i c a t i o n c i r c u i t for APW8822a c ldo 3 1 m f v in : 6 v to 25 v boot 2 ugate 2 phase 2 lgate 2 fb 2 enilim 2 c boot 2 0 . 22 m f c out 2 330 m f / 6 . 3 vx 2 4 m ohm l out 2 2 . 2 m h c in 2 10 m f q 3 apm 4810 v out 2 3 . 3 v / 11 a r boot 2 0 boot 1 ugate 1 phase 1 lgate 1 fb 1 c boot 1 0 . 1 m f c out 1 330 m f / 10 v 9 m ohm l out 1 4 . 7 m h c in 1 10 m f q 1 apm 4810 v out 1 5 v / 7 a r boot 1 0 gnd gnd ldo 5 q 2 apm 4810 q 4 apm 4810 ldo 3 vin enilim 1 gnd r ilim 2 200 k c ldo 5 1 m f pok gnd r pok 200 k r ilim 1 200 k r top 1 30 k r top 2 13 k r gnd 2 20 k r gnd 1 20 k vclk v cp 15 v c cp 1 100 n f c cp 2 100 n f c cp 3 100 n f c cp 4 1 m f d 1 d 2 d 3 d 4 byp enldo on off free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 5 f u n c t i o n d e s c r i p t i o n c o n s t a n t - o n - t i m e p w m c o n t r o l l e r w i t h i n p u t f e e d - f o r - w a r d the constant-on-time control architecture is a pseudo- fixed frequency with input voltage feed-forward. this ar- chitecture relies on the output filter capacitor?s effective series resistance (esr) to act as a current-sense resistor, so the output ripple voltage provides the pwm ramp signal. in pfm operation, the high-side switch on-time controlled by the on-time generator is determined solely by a one- shot whose pulse width is inversely proportional to input voltage and directly proportional to output voltage. in pwm operation, the high-side switch on-time is determined by a switching frequency control circuit in the on-time gen- erator block. the switching frequency control circuit senses the switching frequency of the high-side switch and keeps regulating it at a constant frequency in pwm mode. the design improves the frequency variation and is more outstanding than a conventional constant-on- time controller, which has large switching frequency varia- tion over input voltage, output current and temperature. both in pfm and pwm, the on-time generator, which senses input voltage on vin pin, provides very fast on- time response to input line transients. another one-shot sets a minimum off-time (typ.: 350ns). the on-time one-shot is triggered if the error comparator is high, the low-side switch current is below the current- limit threshold, and the minimum off-time one-shot has timed out. linear regulator (ldo3 and ldo5) the ldo3 and ldo5 regulators can supply up to 100ma for external loads. bypass to gnd with a minimum of 1uf ceramic capacitor for stability. for APW8822a, when enldo is enabled, the vldo3 is fixed 3.33v and the vldo5 is fixed 5v in standby mode. for APW8822c, when vin reaches por rising threshold, the vldo3 is fixed 3. 33v and the vldo5 is fixed 5v in standby mode. let is see the table2?power-up control logic? for the detail description about standby mode. for all of APW8822 series, when pwm1 output voltage is over whose by- pass threshold (pwm1 is 4.7v), the internal ldo5 to vout1 switchover is active. these actions change the current path to power the loads from the pwm regulator voltage, rather than from the internal linear regulator. pulse-frequency modulation (pfm) mode in pfm mode, an automatic switchover to pulse-frequency modulation (pfm) takes place at light loads. this switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current zero crossing. this mechanism causes the threshold between pfm and pwm operation to coincide with the boundary between continuous and discontinuous inductor-current operation (also known as the critical conduction point). the on-time of pfm is given by: power -on-reset a power-on-reset (por) function is designed to prevent wrong logic controls. the por function continually moni- tors the supply voltage on the ldo5 pins. ldo5 por circuitry inhibits wrong switching. when the rising vldo5 voltage reaches the rising por threshold (4.3v typical), the pwm output voltages begin to ramp up. when the ldo5 voltage is lower than 4.2v(typ.) or ldo3 voltage is lower than 2.374v(typ.), both switch power supplies are shut off. this is non-latch protection. ldo5 por thresh- old could reset the under-voltage, over-voltage. in out sw pfm - on v v f 1 t = where f sw is the nominal switching frequency of the con- verter in pwm mode. similarly, the on-time of ultrasonic mode is the same with pfm mode. the description of ultrasonic mode will be illustrated later. the load current at handoff from pfm to pwm mode is given by: pfm on out in pwm) to load(pfm t l v v 2 1 i - - = in out sw out in v v f 1 l 2 v v - = free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 6 f u n c t i o n d e s c r i p t i o n ( c o n t . ) soft start the condition of the 270khz clock signal can be used is that the en1 is high. when vout1 regulates at 5v and the clock signal uses vout1 as its power supply, the charge pump circuit can generate 15v dc voltage approximately. the example of charge pump circuit is shown in typical application circuit. charge pump i n t h e e v e n t o f p w m u n d e r - v o l t a g e o r s h u t d o w n , t h e c h i p e n a b l e s t h e s o f t - s t o p f u n c t i o n . t h e s o f t - s t o p f u n c t i o n d i s - c h a r g e s t h e p w m o u t p u t v o l t a g e s t o l o w v o l t a g e b y t h e s o f t s t o p m e t h o d . t h e r e f e r e n c e r e m a i n s a c t i v e t o p r o - v i d e a n a c c u r a t e t h r e s h o l d a n d t o p r o v i d e o v e r - v o l t a g e p r o t e c t i o n . s o f t - s t o p ( p w m s ) pok is actively held low in shutdown, standby, and soft- start. in the soft-start process, the pok is an open-drain output, and it is released with enable delay after the lat- est enx goes high (about 2ms typ.). in normal operation, the pok window is from 90% to its ovp threshold of the converter reference voltage. both of vout1 and vout2 have to stay within this window for pok to be high (and gated). in order to prevent false pok drop, capacitors need to parallel at the output to confine the voltage devia- tion with severe load step transient. power good indicator (pwms) i n t h e p r o c e s s o f o p e r a t i o n , i f a s h o r t - c i r c u i t o c c u r s , t h e o u t p u t v o l t a g e w i l l d r o p q u i c k l y . w h e n l o a d c u r r e n t i s b i g - g e r t h a n c u r r e n t l i m i t t h r e s h o l d v a l u e , t h e o u t p u t v o l t a g e w i l l f a l l o u t o f t h e r e q u i r e d r e g u l a t i o n r a n g e . t h e u n d e r - v o l t a g e c o n t i n u a l l y m o n i t o r s t h e s e t t i n g o u t p u t v o l t a g e a f t e r s o f t - s t a r t i s c o m p l e t e d . i f a l o a d s t e p i s s t r o n g e n o u g h t o p u l l t h e o u t p u t v o l t a g e l o w e r t h a n t h e u n d e r - v o l t a g e t h r e s h o l d f o r a t l e a s t 2 5 m s , t h e p w m c o n t r o l l e r s t a r t s a s o f t - s t o p p r o c e s s t o s h u t d o w n t h e o u t p u t g r a d u a l l y . a s l o n g a s e i t h e r o f p w m c h a n n e l s t r i g g e r s u n d e r - v o l t a g e , b o t h o f p w m c h a n n e l s a c t i v e u n d e r - v o l t a g e p r o t e c t i o n a n d l a t c h e d o f f w h e n t h e s o f t - s t o p p r o c e s s i s c o m p l e t e d . t h e u n d e r - v o l t a g e t h r e s h o l d i s 7 0 % o f t h e n o m i n a l o u t - p u t v o l t a g e . u n d e r - v o l t a g e p r o t e c t i o n i s i g n o r e d f o r a t l e a s t 2 m s ( t y p i c a l ) a f t e r a r i s i n g e d g e o n e n . r e - t o g g l i n g e n 1 a n d e n 2 ( l o g i c a n d ) s i g n a l w i l l c l e a r t h e l a t c h a n d b r i n g t h e c h i p b a c k t o o p e r a t i o n . u n d e r - v o l t a g e p r o t e c t i o n ( p w m s ) the APW8822/a/b/c integrates soft-start circuit to ramp up the pwmx output voltage of the converter to the pro- grammed regulation set point at a predictable slew rate. the slew rate of pwmx output voltage is internally con- trolled to limit the inrush current through the output ca- pacitors during soft start process. when the enx pin is pulled above the rising threshold voltage, the related pwm initiates a soft-start process to ramp up the output voltage. the soft-start interval is 1.4ms(typical) and independent of the ugate switching frequency. enable controls the APW8822/a/b/c has two independent enable con- trols for pwm part. when the enx pin is high (enilimx=1) at standby mode, the pwmx initiates a soft-start process to ramp up the output voltage. the pwm1 and pwm2 are con- trolled individually by en1 and en2. when en1 and en2 are both low, the chip is in its low-power standby state. the APW8822/b only consumes 80 m a of current while in standby mode. when the en1 is high, the clock signal becomes avail- able from vclk pin. both pwm outputs are discharged to low voltage by the soft stop method and both ldo outputs are discharged to 0v through a 50 w switch in soft stop state. driving en1 and en2 (logic and) below low threshold clears the over-voltage, and under-voltage fault latches. free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 7 current limit (pwms) f u n c t i o n d e s c r i p t i o n ( c o n t . ) w h e n t h e j u n c t i o n t e m p e r a t u r e i n c r e a s e s a b o v e t h e r i s - i n g t h r e s h o l d t e m p e r a t u r e 1 6 0 o c , t h e i c w i l l e n t e r t h e o v e r t e m p e r a t u r e p r o t e c t i o n ( o t p ) . w h e n t h e o t p o c c u r s , l d o a n d p w m c o n t r o l l e r s c i r c u i t r y s h u t s d o w n . i t i s n o n - l a t c h p r o t e c t i o n . over-temperature protection the current limit circuit employs a "valley" current-sens- ing algorithm (see figure 1). the APW8822/a/b/c uses the low-side mosfet?s r ds(on) of the synchronous recti- fier as a current-sensing element. if the magnitude of the current-sense signal at phase pin is above the current- limit threshold, the pwm is not allowed to initiate a new cycle. the actual peak current is greater than the current- limit threshold by an amount equal to the inductor ripple current. therefore, the exact current-limit characteristic and maximum load capability are a function of the sense resistance, inductor value, and input voltage. both pwm controllers use the low-side mosfets on- resistance r ds(on) to monitor the current for protection against shorted outputs. the mosfet?s r ds(on) is varied by temperature and gate to source voltage, the user should determine the maximum r ds(on) in manufacture?s datasheet. the current limit threshold of APW8822/a/b/c is adjusted with an external resistor. for APW8822a, the enilimx pin adjustment range is from 515mv to 2v. in the adjustable mode, the current-limit threshold voltage is 1/8th the volt- age at ilimx pin. as shown in figure 2, the ilimx pin can source 10 m a. the voltage at ilimx pin is equal to 10 m a x rilim. the logic current limit threshold is default to 250mv value if voltage at ilimx pin is above 2v(enilimx is 5v). the relationship between the sampled voltage vilim and the current limit threshold ilimit is given by: should the output voltage of vout1 and vout2 increase over 25% of the setting voltage due to the high-side mosfet failure or for other reasons, the over voltage protection will active. as long as either of pwm channels triggers over voltage, the other pwm channel will be soft stop state. over voltage protection will force the low-side mosfet gate driver fully turn on. this action actively pulls down the output voltage. when the ovp occurs, the pok pin will pull down and latch-off the converter. this ovp scheme only clamps the voltage overshoot, and does not invert the output voltage when otherwise activated with a continuously high output from low-side mosfet driver. it?s a common problem for ovp schemes with a latch. once an over-voltage fault condition is set, it can be reset by re-toggling en1 and en2 (logic and) signal. over voltage protection (ovp) time i n d u c t o r c u r r e n t 0 i peak i out i limit g i figure 1. current-limit algorithm where vilimx is the voltage at the ilimx pin. rds(on) is the low side mosfets conducive resistance. ilimit is the setting current limit threshold. ilimit can be ex- pressed as iout minus half of peak-to-peak inductor current. the pcb layout guidelines should ensure that noise and dc errors do not corrupt the current-sense signals at phase. place the hottest power mosefts as close to the ic as possible for best thermal coupling. when com- bined with the under-voltage protection circuit, this cur- rent-limit method is effective in almost every circumstance. ) on ( ds limit ilimx r i v = 8 1 ) on ( ds limit enilimx r i v = 8 1 ---APW8822/b/c ---APW8822a free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 8 f u n c t i o n d e s c r i p t i o n ( c o n t . ) figure 2. current-limit setting block diagram 10 m a to current limit logic 7 r r ilim / eni lim v ilim / eni lim r ilim table 1. operating mode truth table mode condition comment APW8822/b/c enx = 1 run APW8822a enldo = 1, enilimx = 1 pwm is in normal operatio n. APW8822/b enx = 0 pwmx is in shutdown with soft stop, and then ldo5 is also in shutdown with discharge function after soft s top function in pwmx is completed. ldo3 is active. APW8822c enx=0 pwmx is in shutdown with soft stop function . ldo3 and ldo5 are active. standby & soft stop APW8822a enilimx=0, enldo=1 pwmx is in shutdown with soft stop function . ldo3 and ldo5 are active. apw882 2/b/c - - shutdown APW8822a enldo=0 pwmx is in shutdown with soft stop, and then ldox is also in shutdown with discharge function after soft stop function in pwmx is completed. in this mode, all circuitry is off. uvp either v out1 , or v out2 < 70% of nominal outpu t voltage the soft stop function will enable to pull low output voltage. ldox is active. r eset by toggling en 1 and en 2 (logic and). this action will re - start ldo5 at the same time. (for APW8822/b). ovp either v out1 and v out2 >125% of normal output voltage lgate of the pwm channel, which occurs ovp event is forced high, the other pwm channel is in shutdown with soft stop. ldox is active. r eset by toggling en 1 and en 2 (logic and). this action will re - start ldo5 at the same time. (for APW8822/b). otp t j > +16 0 o c all circuitry off. it is non - latch protection after the junction temperature co ols by 25 j . free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 1 9 f u n c t i o n d e s c r i p t i o n ( c o n t . ) table 2. power-up control logics v en1 v en2 ldo5 ldo3 pwm1 pwm2 vclk low low off on off off off high high on on on on on high low on on on off on low high on on off on off for APW8822/b v en1 v en2 ldo5 ldo3 pwm1 pwm2 vclk low low on on off off off high high on on on on on high low on on on off on low high on on off on off for APW8822c v enldo v enilim1 v enilim2 ldo5 ldo3 pwm1 pwm2 vclk low don ? t care don ? t care off off off off off 0.8v~1.6v low low on on off off off 0.8v~1.6v high high on on on on off 0.8v~1.6v high low on on on off off 0.8v~1.6v low high on on off on off >2.4v low low on on off off off >2.4v high high on on on on on >2.4v high low on on on off on >2.4v low high on on off on off for APW8822a free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 0 a p p l i c a t i o n i n f o r m a t i o n the output voltage of pwm1 can be adjusted from 2v to 5.5v with a resistor-driver at fb1 between vout1 and gnd. using 1% or better resistors for the resistive di- vider is recommended. the fb1 pin is the inverter input of the error amplifier, and the reference voltage is 2v. take the example, the output voltage of pwm1 is deter- mined by: w h e r e f s w i s t h e s w i t c h i n g f r e q u e n c y o f t h e r e g u l a t o r . i n c r e a s i n g t h e i n d u c t o r v a l u e a n d f r e q u e n c y w i l l r e - d u c e t h e r i p p l e c u r r e n t a n d v o l t a g e . h o w e v e r , t h e r e i s a t r a d e o f f b e t w e e n t h e i n d u c t o r ? s r i p p l e c u r r e n t a n d t h e r e g u l a t o r l o a d t r a n s i e n t r e s p o n s e t i m e . a s m a l l e r i n d u c t o r w i l l g i v e t h e r e g u l a t o r a f a s t e r l o a d t r a n s i e n t r e s p o n s e a t t h e e x p e n s e o f h i g h e r r i p p l e c u r r e n t . i n c r e a s i n g t h e s w i t c h i n g f r e q u e n c y ( f s w ) a l s o r e d u c e s t h e r i p p l e c u r r e n t a n d v o l t a g e , b u t i t w i l l i n c r e a s e t h e s w i t c h i n g l o s s o f t h e m o s f e t s a n d t h e p o w e r d i s s i p a t i o n o f t h e c o n v e r t e r . t h e m a x i m u m where r top 1 is the resistor connected from v out i to v fb1 and r gnd 1 is the resistor connected from fb1 to gnd. similarly, the output voltage of pwm2 can be alsoadjusted from 2v to 5.5v. o u t p u t i n d u c t o r s e l e c t i o n t h e d u t y c y c l e o f a b u c k c o n v e r t e r i s t h e f u n c t i o n o f t h e i n p u t v o l t a g e a n d o u t p u t v o l t a g e . o n c e a n o u t p u t v o l t a g e i s f i x e d , i t c a n b e w r i t t e n a s : in out v v d = in out sw out in ripple v v l f v - v i = o u t p u t c a p a c i t o r s e l e c t i o n the inductor value determines the inductor ripple current and affects the load transient reponse. higher inductor value reduces the inductor?s ripple current and induces lower output ripple voltage. the ripple current can be approxminated by: esr ripple esr sw out ripple out c r i v f 8c i v = d = d these two components constitute a large portion of the total output voltage ripple . in some applications, multiple capacitors have to be paralleled to achieve the desired esr value. if the output of the converter has to support an other load with high pulsating current, more capaci- tors are needed in order to reduce th e equivalent esr and s uppress the voltage ripple to a tolerable level. a small decoupling capacitor in parallel for bypassing the noise is also recommended, and the voltage rating of the output capacitors must also be considered. to support a load transient that is faster than the switching frequency, more capacitors have to be used to reduce the voltage excursion during load step change. another aspect of the capacitor selection is that the total ac current going through the capaci tors has to be less than the rated rms current specified on the ca- pacitors to prevent the capacitor from over-heating. ? ? ? ? ? + = gnd1 top1 outi r r 1 2 v r i p p l e c u r r e n t o c c u r s a t t h e m a x i m u m i n p u t v o l t a g e . a g o o d s t a r t i n g p o i n t i s t o c h o o s e t h e r i p p l e c u r r e n t t o b e a p p r o x i m a t e l y 3 0 % o f t h e m a x i m u m o u t p u t c u r r e n t . o n c e t h e i n d u c t a n c e v a l u e h a s b e e n c h o s e n , s e l e c t i n g a n i n d u c t o r i s c a p a b l e o f c a r r y i n g t h e r e q u i r e d p e a k c u r - r e n t w i t h o u t g o i n g i n t o s a t u r a t i o n . i n s o m e t y p e s o f i n d u c t o r s , e s p e c i a l l y c o r e t h a t i s m a d e o f f e r r i t e , t h e r i p p l e c u r r e n t w i l l i n c r e a s e a b r u p t l y w h e n i t s a t u r a t e s . t h i s w i l l b e r e s u l t i n a l a r g e r o u t p u t r i p p l e v o l t a g e . o u t p u t v o l t a g e s e l e c t i o n o u t p u t v o l t a g e r i p p l e a n d t h e t r a n s i e n t v o l t a g e d e - v i a t i o n a r e f a c t o r s t h a t h a v e t o b e t a k e n i n t o c o n s i d - e r a t i o n w h e n s e l e c t i n g a n o u t p u t c a p a c i t o r . h i g h e r c a p a c i t o r v a l u e a n d l o w e r e s r r e d u c e t h e o u t p u t r i p p l e a n d t h e l o a d t r a n s i e n t d r o p . t h e r e f o r e , s e l e c t i n g h i g h p e r f o r m a n c e l o w e s r c a p a c i t o r s i s i n t e n d e d f o r s w i t c h - i n g r e g u l a t o r a p p l i c a t i o n s . i n a d d i t i o n t o h i g h f r e q u e n c y n o i s e r e l a t e d m o s f e t t u r n - o n a n d t u r n - o f f , t h e o u t p u t v o l t a g e r i p p l e i n c l u d e s t h e c a p a c i t a n c e v o l t a g e d r o p a n d e s r v o l t a g e d r o p c a u s e d b y t h e a c p e a k - t o - p e a k c u r r e n t . t h e s e t w o v o l t a g e s c a n b e r e p r e s e n t e d b y : free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 1 a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) i n p u t c a p a c i t o r s e l e c t i o n t h e i n p u t c a p a c i t o r i s c h o s e n b a s e d o n t h e v o l t a g e r a t i n g a n d t h e r m s c u r r e n t r a t i n g . f o r r e l i a b l e o p e r a t i o n , s e l e c t t h e c a p a c i t o r v o l t a g e r a t i n g t o b e a t l e a s t 1 . 3 t i m e s h i g h e r t h a n t h e m a x i m u m i n p u t v o l t a g e . t h e m a x i m u m r m s c u r r e n t r a t i n g r e q u i r e m e n t i s a p p r o x i m a t e l y i o u t / 2 , w h e r e i o u t i s t h e l o a d c u r r e n t . d u r i n g p o w e r u p , t h e i n p u t c a p a c i - t o r s h a v e t o h a n d l e l a r g e a m o u n t o f s u r g e c u r r e n t . i n l o w - d u t y n o t e b o o k a p p l i a c t i o n s , c e r a m i c c a p a c i t o r s a r e r e m m e n d e d . t h e c a p a c i t o r s m u s t b e c o n n e c t e d b e t w e e n t h e d r a i n o f h i g h - s i d e m o s f e t a n d t h e s o u r c e o f l o w - s i d e m o s f e t w i t h v e r y l o w - i m p e a d a n c e p c b l a y o u t . m o s f e t s e l e c t i o n t h e a p p l i c a t i o n f o r a n o t e b o o k b a t t e r y w i t h a m a x i m u m v o l t - a g e o f 2 4 v , a t l e a s t a m i n i m u m 3 0 v m o s f e t s s h o u l d b e u s e d . t h e d e s i g n h a s t o t r a d e o f f t h e g a t e c h a r g e w i t h t h e r ds(on) o f t h e m o s f e t : f o r t h e l o w - s i d e m o s f e t , b e f o r e i t i s t u r n e d o n , t h e b o d y d i o d e h a s b e e n c o n d u c t e d . t h e l o w - s i d e m o s f e t d r i v e r w i l l n o t c h a r g e t h e m i l l e r c a p a c i t o r o f t h i s m o s f e t . i n t h e t u r n i n g o f f p r o c e s s o f t h e l o w - s i d e m o s f e t , t h e l o a d c u r r e n t w i l l s h i f t t o t h e b o d y d i o d e f i r s t . t h e h i g h d v / d t o f t h e p h a s e n o d e v o l t a g e w i l l c h a r g e t h e m i l l e r c a p a c i t o r t h r o u g h t h e l o w - s i d e m o s f e t d r i v e r s i n k i n g c u r r e n t p a t h . t h i s r e s u l t s i n m u c h l e s s s w i t c h i n g l o s s o f t h e l o w - s i d e m o s f e t s . t h e d u t y c y c l e i s o f t e n v e r y s m a l l i n h i g h b a t t e r y v o l t a g e a p p l i c a t i o n s , a n d t h e l o w - s i d e m o s f e t w i l l c o n - d u c t m o s t o f t h e s w i t c h i n g c y c l e ; t h e r e f o r e , t h e l e s s t h e r ds(on) o f t h e l o w - s i d e m o s f e t , t h e l e s s t h e p o w e r l o s s . t h e g a t e c h a r g e f o r t h i s m o s f e t i s u s u a l l y a s e c o n d a r y c o n s i d e r a t i o n . t h e h i g h - s i d e m o s f e t d o e s n o t h a v e t h i s z e r o v o l t a g e s w i t c h i n g c o n d i t i o n , a n d b e c a u s e i t c o n d u c t s f o r l e s s t i m e c o m p a r e d t o t h e l o w - s i d e m o s f e t , t h e s w i t c h i n g l o s s t e n d s t o b e d o m i n a n t . p r i o r i t y s h o u l d b e g i v e n t o t h e m o s f e t s w i t h l e s s g a t e c h a r g e , s o t h a t b o t h t h e g a t e d r i v e r l o s s a n d s w i t c h i n g l o s s w i l l b e m i n i m i z e d . p high-side = i out 2 (1+ tc)(r ds(on) )d + (0.5)( i out )(v in )( t sw )f s w p low-side = i out 2 (1+ tc)(r ds(on) )(1-d) where i out is the load current tc is the temperature dependency of r ds(on) f sw is the switching frequency t sw is the switching interval d is the duty cycle note that both mosfets have conduction losses while the high- side mosfet include s an additional transi - tion loss. t he switching internal, t sw , is the function of the reverse transfer capacitance c rss . the (1+tc) term is to factor in the temperature dependency of the r ds(on) and can be extracted from the ?r ds(on) vs temperature? curve of the power mosfet. l a y o u t c o n s i d e r a t i o n i n a n y h i g h s w i t c h i n g f r e q u e n c y c o n v e r t e r , a c o r r e c t l a y o u t i s i m p o r t a n t t o e n s u r e p r o p e r o p e r a t i o n o f t h e r e g u l a t o r . w i t h p o w e r d e v i c e s s w i t c h i n g a t h i g h e r f r e q u e n c y , t h e r e s u l t i n g c u r r e n t t r a n s i e n t w i l l c a u s e v o l t a g e s p i k e a c r o s s t h e i n t e r c o n n e c t i n g i m p e d a n c e a n d p a r a s i t i c c i r c u i t e l e m e n t s . a s a n e x a m p l e , c o n s i d e r t h e t u r n - o f f t r a n s i t i o n o f t h e p w m m o s f e t . b e f o r e t u r n - o f f c o n d i t i o n , t h e m o s f e t i s c a r r y i n g t h e f u l l l o a d c u r r e n t . d u r i n g t u r n - o f f , c u r r e n t s t o p s f l o w i n g i n t h e m o s f e t a n d i s f r e e w h e e l i n g b y t h e l o w e r m o s f e t a n d p a r a s i t i c d i o d e . a n y p a r a s i t i c i n d u c t a n c e o f t h e c i r c u i t g e n e r a t e s a l a r g e v o l t a g e s p i k e d u r i n g t h e s w i t c h i n g i n t e r v a l . i n g e n e r a l , u s i n g s h o r t a n d w i d e p r i n t e d c i r c u i t t r a c e s s h o u l d m i n i m i z e i n t e r c o n n e c t - i n g i m p e d a n c e s a n d t h e m a g n i t u d e o f v o l t a g e s p i k e . a n d s i g n a l a n d p o w e r g r o u n d s a r e t o b e k e p t s e p a r a t i n g a n d f i n a l l y c o m b i n e d t o u s e t h e g r o u n d p l a n e c o n s t r u c t i o n o r s i n g l e p o i n t g r o u n d i n g . t h e b e s t t i e - p o i n t b e t w e e n t h e s i g n a l g r o u n d a n d t h e p o w e r g r o u n d i s a t t h e n e g a t i v e s i d e o f t h e o u t p u t c a p a c i t o r o n e a c h c h a n n e l , w h e r e t h e r e i s l e s s n o i s e . n o i s y t r a c e s b e n e a t h t h e i c a r e n o t r e c o m m e n d e d . b e l o w i s a c h e c k l i s t f o r y o u r l a y o u t : t h e s e l e c t i o n o f t h e n - c h a n n e l p o w e r m o s f e t s a r e d e - t e r m i n e d b y t h e r ds(on) , r e v e r s i n g t r a n s f e r c a p a c i t a n c e ( c r s s ) a n d m a x i m u m o u t p u t c u r r e n t r e q u i r e m e n t . t h e l o s s e s i n t h e m o s f e t s h a v e t w o c o m p o n e n t s : c o n d u c - t i o n l o s s a n d t r a n s i t i o n l o s s . f o r t h e h i g h - s i d e a n d l o w - s i d e m o s f e t s , t h e l o s s e s a r e a p p r o x i m a t e l y g i v e n b y t h e f o l l o w i n g e q u a t i o n s : free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 2 l a y o u t c o n s i d e r a t i o n ( c o n t . ) a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) k e e p t h e s w i t c h i n g n o d e s ( u g a t e x , l g a t e x , b o o t x , a n d p h a s e x ) a w a y f r o m s e n s i t i v e s m a l l s i g n a l n o d e s ( i l i m x , a n d f b x ) s i n c e t h e s e n o d e s a r e f a s t m o v i n g s i g n a l s . t h e r e f o r e , k e e p t r a c e s t o t h e s e n o d e s a s s h o r t a s p o s s i b l e a n d t h e r e s h o u l d b e n o o t h e r w e a k s i g n a l t r a c e s i n p a r a l l e l w i t h t h e s e s t r a c e s o n a n y l a y e r . t h e s i g n a l s g o i n g t h r o u g h t h e s e s t r a c e s h a v e b o t h h i g h d v / d t a n d h i g h d i / d t , w i t h h i g h p e a k c h a r g i n g a n d d i s c h a r g i n g c u r r e n t . t h e t r a c e s f r o m t h e g a t e d r i v e r s t o t h e m o s f e t s ( u g a t e x a n d l g a t e x ) s h o u l d b e s h o r t a n d w i d e . p l a c e t h e s o u r c e o f t h e h i g h - s i d e m o s f e t a n d t h e d r a i n o f t h e l o w - s i d e m o s f e t a s c l o s e a s p o s s i b l e . m i n i m i z i n g t h e i m p e d a n c e w i t h w i d e l a y o u t p l a n e b e - t w e e n t h e t w o p a d s r e d u c e s t h e v o l t a g e b o u n c e o f t h e n o d e . d e c o u p l i n g c a p a c i t o r , t h e r e s i s t o r d i v i d e r s , b o o t c a p a c i t o r s , a n d c u r r e n t - l i m i t s t e t t i n g r e s i s t o r s h o u l d b e c l o s e t o t h e i r p i n s . ( f o r e x a m p l e , p l a c e t h e d e c o u p l i n g c e r a m i c c a p a c i t o r n e a r t h e d r a i n o f t h e h i g h - s i d e m o s f e t a s c l o s e a s p o s s i b l e . t h e b u l k c a p a c i t o r s a r e a l s o p l a c e d n e a r t h e d r a i n ) . t h e i n p u t c a p a c i t o r s h o u l d b e n e a r t h e d r a i n o f t h e u p p e r m o s f e t ; t h e h i g h q u a l i t y c e r a m i c d e c o u p l i n g c a p a c i t o r c a n b e p u t c l o s e t o t h e v c c a n d g n d p i n s ; t h e o u t p u t c a p a c i t o r s h o u l d b e n e a r t h e l o a d s . t h e i n p u t c a p a c i t o r g n d s h o u l d b e c l o s e t o t h e o u t p u t c a - p a c i t o r g n d a n d t h e l o w e r m o s f e t g n d . t h e d r a i n o f t h e m o s f e t s ( v i n a n d p h a s e x n o d e s ) s h o u l d b e a l a r g e p l a n e f o r h e a t s i n k i n g . a n d p h a s e x p i n t r a c e s a r e a l s o t h e r e t u r n p a t h f o r u g a t e x . c o n - n e c t t h e s e p i n s t o t h e r e s p e c t i v e c o n v e r t e r ? s u p p e r m o s f e t s o u r c e . t h e c o n t r o l l e r u s e d r i p p l e m o d e c o n t r o l . b u i l d t h e r e - s i s t o r d i v i d e r c l o s e t o t h e f b 1 p i n s o t h a t t h e h i g h i m p e d a n c e t r a c e i s s h o r t e r w h e n t h e o u t p u t v o l t a g e i s i n a d j u s t a b l e m o d e . a n d t h e f b 1 p i n t r a c e s c a n ? t b e c l o s e t o t h e s w i t c h i n g s i g n a l t r a c e s ( u g a t e x , l g a t e x , b o o t x , a n d p h a s e x ) . t h e p g n d t r a c e s h o u l d b e a s e p a r a t e t r a c e , a n d i n - d e p e n d e n t l y g o t o t h e s o u r c e o f t h e l o w - s i d e m o s f e t s f o r c u r r e n t - l i m i t a c c u r a c y . 0 . 4 mm 0 . 2 mm 0 . 5 mm 3 mm * just recommend tqfn 3 x 3 - 20 0 . 5 mm * 3 mm 1 . 6 6 m m 1 . 66 mm 0 . 17 mm free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 3 p a c k a g e i n f o r m a t i o n t q f n 3 x 3 - 2 0 pin 1 d e pin 1 corner d 2 e 2 k l e s y m b o l min . max . 0 . 80 0 . 00 0 . 15 0 . 25 1 . 50 1 . 80 0 . 05 1 . 50 a a 1 b d d 2 e e 2 e l millimeters a 3 0 . 20 ref tqfn 3 x 3 - 20 0 . 30 0 . 50 1 . 80 0 . 008 ref min . max . inches 0 . 031 0 . 000 0 . 006 0 . 010 0 . 059 0 . 071 0 . 059 0 . 012 0 . 020 0 . 70 0 . 071 0 . 028 0 . 002 0 . 40 bsc 0 . 016 bsc k 0 . 20 0 . 008 2 . 90 3 . 10 0 . 114 0 . 122 2 . 90 3 . 10 0 . 114 0 . 122 note : 1 . followed from jedec mo - 220 weee a b a 1 a 3 nx aaa c aaa 0 . 08 0 . 003 free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 4 application a h t1 c d d w e1 f 330 ? 2.00 50 min. 12.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 12.0 ? 0.30 1.75 ? 0.10 5.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tqfn3x3 - 20 4.0 ? 0.10 8.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0 .40 3.30 ? 0.20 3.30 ? 0.20 1.30 ? 0.20 (mm) d e v i c e s p e r u n i t c a r r i e r t a p e & r e e l d i m e n s i o n s package type unit quantity tqfn3x3 - 20 tape & reel 3000 a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1 h t1 a d free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 5 t a p i n g d i r e c t i o n i n f o r m a t i o n c l a s s i f i c a t i o n p r o f i l e supplier t p ? t c supplier t p user t p ?? t c user t p t t s time t e m p e r a t u r e t p t l t p t c -5 o c 25 time 25 o c to peak max. ramp up rate = 3 o c/s max. ramp down rate = 6 o c/s preheat area t smax t smin t c t c -5 o c t q f n 3 x 3 - 2 0 user direction of feed free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 6 profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spe cified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. c l a s s i f i c a t i o n r e f l o w p r o f i l e s table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ t j =125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma r e l i a b i l i t y t e s t p r o g r a m c l a s s i f i c a t i o n r e f l o w p r o f i l e s ( c o n t . ) free datasheet http:/// c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - n o v . , 2 0 1 2 a p w 8 8 2 2 / a / b / c w w w . a n p e c . c o m . t w 2 7 c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8 free datasheet http:/// |
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